US Patent 11861358 Firmware update of an interconnect device

An example device includes a processor; a first interface port forming a first datalink to a core network device via a first interconnect device; and a second interface port forming a second datalink to the core network device via a second interconnect device, the first and second datalinks being redundant connections of a link aggregation group (LAG) including a plurality of multiplexed connections within a single network media. The processor is to: remove the first interconnect device while maintaining the second datalink; update firmware of the first interconnect device upon receiving a first indication that the first interconnect device has stopped receiving or transmitting data; and reestablish the redundant connections of the first interconnect device upon receiving a second indication that the first interconnect device has been added back to the LAG. The first and second indications include indications of states in each connection of the multiplexed connections.