Patent attributes
An apparatus includes a safety fault interrupter circuit. The safety fault interrupter circuit includes a safety fault monitor coupled to a first bias node and configured to selectively assert a fault interrupter signal based at least in part on a first bias voltage and a first power consumption. The safety fault interrupter circuit also includes a power fault monitor for the safety fault monitor, wherein the power fault monitor is coupled to a second bias node and is configured to selectively assert the fault interrupter signal based at least in part on a second bias voltage and a second power consumption that is less than the first power consumption.