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US Patent 11876524 Hybrid ADC circuit and method

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
June 28, 2022
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Date of Patent
January 16, 2024
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Patent Application Number
17809315
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Patent Citations
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US Patent 10432210 Oversampled continuous-time pipeline ADC with digital signal reconstruction
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US Patent 11005491 System and method for wireless receiver communication based on variable leading bit orthogonal code sets
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US Patent 9614510 Input path matching in pipelined continuous-time analog-to-digital converters
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US Patent 10171102 Oversampled continuous-time pipeline ADC with voltage-mode summation
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US Patent 10181860 Reducing residue signals in analog-to-digital converters
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US Patent 10187075 Blocker tolerance in continuous-time residue generating analog-to-digital converters
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US Patent 10361711 Stub filters to improve blocker tolerance in continuous-time residue generation analog-to-digital converters
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Patent Inventor Names
Muhammed Bolatkale
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11876524
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Patent Primary Examiner
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Joseph J Lauture
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CPC Code
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H03M 1/12
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H03M 1/001
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H03M 3/00
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H03M 1/00
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H03M 1/0629
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