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US Patent 11923331 Die attached leveling control by metal stopper bumps

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
February 25, 2021
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Date of Patent
March 5, 2024
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Patent Application Number
17184924
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Patent Citations
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US Patent 7531893 Power semiconductor devices having integrated inductor
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US Patent 7830020 Integrated circuit package system employing device stacking
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US Patent 7871865 Stress free package and laminate-based isolator package
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US Patent 8550327 Clad solder thermal interface material
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US Patent 8940584 Semiconductor packages and methods of forming the same
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US Patent 9196575 Integrated circuit package with cavity in substrate
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US Patent 9391043 Semiconductor device and manufacturing method thereof
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US Patent 9543242 Semiconductor package and fabricating method thereof
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US Patent 9607863 Integrated circuit package with vacant cavity
0
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US Patent 9721872 Methods and structures for increasing the allowable die size in TMV packages
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•••
Patent Inventor Names
Kuei-Sung Chang
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Wei-Jhih Mao
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Shang-Ying Tsai
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11923331
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Patent Primary Examiner
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Telly D Green
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