Patent attributes
A multi-port transceiver comprises a plurality of first ports, a first communication interface, and a second communication interface. Multi-rate interleaver circuitry interleaves i) a plurality of first data streams, each received via a respective first port at a first data rate, and ii) a second data stream received via the first communication interface at a second data rate, to generate a third data stream to be transmitted via the second communication interface at a third data rate. Multi-rate deinterleaver circuitry deinterleaves a fourth data stream that was received via the second communication interface at the third data rate into i) a plurality of fifth data streams, each fifth data stream to be transmitted via a respective first port at the first data rate, and ii) a sixth data stream to be transmitted via the first communication interface at the second data rate.
