Is a
Patent attributes
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Satish Kumar Vangara0
Gregory Szczeszynski0
Xiaowu Sun0
Antony Christopher Routledge0
Date of Patent
March 19, 2024
0Patent Application Number
179599040
Date Filed
October 4, 2022
0Patent Citations
Patent Primary Examiner
Patent abstract
Circuits and methods that limit current through power FETs of power converter to reduce damaging current in-rush events, independent of switching frequency, device mismatches, and PVT variations. Embodiments utilize a closed-loop feedback circuit and/or a calibrated compensation circuit to regulate, substantially independent of frequency, the control voltage V
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.