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US Patent 11948619 Protocol for memory power-mode control

Patent 11948619 was granted and assigned to Rambus on April, 2024 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
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Current Assignee
Rambus
Rambus
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Date Filed
March 9, 2023
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Date of Patent
April 2, 2024
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Patent Applicant
Rambus
Rambus
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Patent Application Number
18181185
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Patent Citations
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US Patent 7031421 Method and device for initializing an asynchronous latch chain
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US Patent 7054223 Semiconductor memory device
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US Patent 7080267 Methodology for managing power consumption in an application
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US Patent 7106646 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
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US Patent 7113417 Integrated memory circuit
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US Patent 7177208 Circuit and method for operating a delay-lock loop in a power saving manner
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US Patent 7248527 Self refresh period control circuits
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US Patent 7248528 Refresh control method of a semiconductor memory device and semiconductor memory device
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US Patent 7320082 Power control system for synchronous memory device
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US Patent 7426153 Clock-independent mode register setting methods and apparatuses
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•••
Patent Inventor Names
Wayne F. Ellis
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Akash Bansal
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Lawrence Lai
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Kishore Ven Kasamsetty
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Wayne S. Richardson
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Frederick A. Ware
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11948619
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Patent Primary Examiner
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Leon Viet Q Nguyen
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CPC Code
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G11C 29/022
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G11C 11/4074
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G11C 11/4072
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G11C 7/20
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G11C 11/40615
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G06F 1/3234
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G11C 7/02
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G11C 29/028
0

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