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US Patent 11966745 Sparse SIMD cross-lane processing unit

Patent 11966745 was granted and assigned to Google on April, 2024 by the United States Patent and Trademark Office.

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Is a
Patent
Patent
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Patent attributes

Patent Applicant
Google
Google
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Current Assignee
Google
Google
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
119667450
Patent Inventor Names
Rahul Nagarajan0
Arpith Chacko Jacob0
Suvinay Subramanian0
Date of Patent
April 23, 2024
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Patent Application Number
179726630
Date Filed
October 25, 2022
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Patent Citations
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US Patent 9086872 Unpacking packed data in multiple lanes
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US Patent 9323672 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems
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US Patent 9628146 Data access in a mobile device with NFC
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US Patent 9851917 Method for de-duplicating data and apparatus therefor
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US Patent 11340792 Ordered event stream merging
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US Patent 11210760 Programmable coarse grained and sparse matrix compute hardware with advanced scheduling
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US Patent 7248266 3-D rendering engine with embedded memory
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US Patent 7249202 System and method for DMA transfer of data in scatter/gather mode
0
...
Patent Primary Examiner
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Scott C Sun
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Patent abstract

Aspects of the disclosure are directed to a cross-lane processing unit (XPU) for performing data-dependent operations across multiple data processing lanes of a processor. Rather than implementing operation-specific circuits for each data-dependent operation, the XPU can be configured to perform different operations in response to input signals configuring individual operations performed by processing cells and crossbars arranged as a stacked network in the XPU. Each processing cell can receive and process data across multiple data processing lanes. Aspects of the disclosure include configuring the XPU to use a vector sort network to perform a duplicate count eliminating the need to configure the XPU separately for sorting and duplicate counting.

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