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US Patent 11973056 Methods for low temperature bonding using nanoparticles

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
December 22, 2022
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Date of Patent
April 30, 2024
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Patent Application Number
18145330
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Patent Citations
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US Patent 10418277 Air gap spacer formation for nano-scale semiconductor devices
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US Patent 11329034 Direct-bonded LED structure contacts and substrate contacts
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US Patent 11348898 Systems and methods for releveled bump planes for chiplets
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US Patent 11355443 Dielets on flexible and stretchable packaging for microelectronics
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US Patent 11710718 Structures and methods for low temperature bonding using nanoparticles
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US Patent 6837979 Method and apparatus for depositing and controlling the texture of a thin film
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US Patent 6852564 Semiconductor device and method of fabricating the same
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US Patent 6864585 Three dimensional device integration method and integrated device
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US Patent 6869750 Structure and method for forming a multilayered structure
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US Patent 6870274 Flash-preventing window ball grid array semiconductor package, method for fabricating the same, and chip carrier used in the semiconductor package
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•••
Patent Inventor Names
Cyprian Emeka Uzoh
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11973056
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Patent Primary Examiner
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Benjamin P Sandvik
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