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US Patent 11977614 Circuit design watermarking
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Patent
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Date Filed
September 20, 2021
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Date of Patent
May 7, 2024
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Patent Application Number
17479623
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Patent Citations
US Patent 8089285 Implementing tamper resistant integrated circuit chips
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US Patent 8402401 Protection of intellectual property cores through a design flow
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US Patent 8564073 Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
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US Patent 10671700 Systems and methods for obfuscating a circuit design
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US Patent 10607948 Secured chip
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US Patent 10970453 Method for the non-copyable manufacture of integrated circuits
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US Patent 7577926 Security-sensitive semiconductor product, particularly a smart-card chip
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US Patent 7801325 Watermarking a chip design based on frequency of geometric structures
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Patent Inventor Names
Daniel James Dechene
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Carl Radens
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Hsueh-Chung Chen
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Lawrence A. Clevenger
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11977614
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Patent Primary Examiner
Stacy Whitmore
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CPC Code
G06F 30/39
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H05K 3/00
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G06F 30/30
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G06F 30/00
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G06F 21/16
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G06F 30/20
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G06F 30/327
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