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US Patent 11985830 Three-dimensional memory device and method

Overview Structured Data Issues Contributors

Is a

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Patent attributes

Patent Jurisdiction

United States Patent and Trademark Office

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Patent Number

Patent Inventor Names

Feng-Cheng Yang0

Chung-Te Lin0

Meng-Han Lin0

Sheng-Chen Wang0

Han-Jong Chia0

Date of Patent

May 14, 2024

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Patent Application Number

178749080

Date Filed

July 27, 2022

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Patent Citations

US Patent 9484389 Three-dimensional resistive memory array

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US Patent 9496274 Three-dimensional non-volatile memory device

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US Patent 9570464 Method for manufacturing semiconductor device

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US Patent 9620513 Semiconductor device and method of manufacturing the same

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US Patent 9620712 Concave word line and convex interlayer dielectric for protecting a read/write layer

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US Patent 9748257 Semiconductor devices having dummy patterns and methods of fabricating the same

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US Patent 9947721 Thermal insulation for three-dimensional memory arrays

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US Patent 9953992 Mid-plane word line switch connection for CMOS under three-dimensional memory device and method of making thereof

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Patent Primary Examiner

S M Sohel Imtiaz

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CPC Code

0

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Patent abstract

A semiconductor device and method of manufacture are provided. In embodiments a memory array is formed by manufacturing portions of a word line during different and separate processes, thereby allowing the portions formed first to act as a structural support during later processes that would otherwise cause undesired damage to the structures.

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