US Patent 12001352 Transaction ordering based on target address

Techniques are provided to maintain data coherency for data transfers among data processing devices in a distributed computing environment. A data buffer in each data processing device can be mapped to an address range that is assigned to transactions that allow out-of-order completions, and a message buffer in each data processing device can be mapped to an address range that is assigned to transactions that follow transaction ordering. Thus, a transaction to store a set of data into the data buffer is completed before a transaction to write a synchronization message in the message buffer indicating that the set of data is stored in the data buffer based on the mapping irrespective of the transaction ordering indicated by each transaction.