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US Patent 12001725 Combined on-package and off-package memory system

Patent 12001725 was granted and assigned to NVIDIA on June, 2024 by the United States Patent and Trademark Office.

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Contents

Is a
Patent
Patent
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Patent attributes

Patent Applicant
NVIDIA
NVIDIA
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Current Assignee
NVIDIA
NVIDIA
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
120017250
Patent Inventor Names
James Michael O'Connor0
Niladrish Chatterjee0
Donghyuk Lee0
Gaurav Uttreja0
Wishwesh Anil Gandhi0
Date of Patent
June 4, 2024
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Patent Application Number
184546930
Date Filed
August 23, 2023
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Patent Citations
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US Patent 11210218 Addressing for disaggregated memory pool
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US Patent 10790039 Semiconductor device having a test circuit
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US Patent 9391915 Controlling bandwidth across multiple users for interactive services
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US Patent 9535831 Page migration in a 3D stacked hybrid memory
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US Patent 9910605 Page migration in a hybrid memory device
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US Patent 10083891 Memory having thermoelectric heat pump and related IC chip package and method
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US Patent 10593380 Performance monitoring for storage-class memory
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Patent Primary Examiner
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Reginald G Bragdon
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CPC Code
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G06F 3/0683
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G06F 3/0685
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G06F 12/0607
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G06F 12/10
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G06F 2212/1016
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G06F 2212/15
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G06F 2212/151
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G06F 2212/152
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Patent abstract

A combined on-package and off-package memory system uses a custom base-layer within which are fabricated one or more dedicated interfaces to off-package memories. An on-package processor and on-package memories are also directly coupled to the custom base-layer. The custom base-layer includes memory management logic between the processor and memories (both off and on package) to steer requests. The memories are exposed as a combined memory space having greater bandwidth and capacity compared with either the off-package memories or the on-package memories alone. The memory management logic services requests while maintaining quality of service (QoS) to satisfy bandwidth requirements for each allocation. An allocation may include any combination of the on and/or off package memories. The memory management logic also manages data migration between the on and off package memories.

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