US Patent 12007907 Victim cache with write miss merging
Patent 12007907 was granted and assigned to Texas Instruments on June, 2024 by the United States Patent and Trademark Office.
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US Patent 12007907 Victim cache with write miss merging
Article
Patent abstract
A caching system including a first sub-cache, a second sub-cache, coupled in parallel with the first sub-cache, for storing cache data evicted from the first sub-cache and write-memory commands that are not cached in the first sub-cache, and a cache controller configured to receive two or more cache commands, determine a conflict exists between the received two or more cache commands, determine a conflict resolution between the received two or more cache commands, and sending the two or more cache commands to the first sub-cache and the second sub-cache.
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Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Naveen Bhoria0
Pete Hippleheuser0
Timothy David Anderson0
Date of Patent
June 11, 2024
0Patent Application Number
178281890
Date Filed
May 31, 2022
0Patent Citations
Patent Primary Examiner
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