Patent attributes
Mixed clock domain signaling and, more particularly, mixed clock domain signaling for light-emitting diode (LED) packages arranged for cascade communication is disclosed. Mixed clock domain signaling involves digital communication where time-positions of bit pulse edges in a communication channel are derived from multiple uncorrelated clock domains, including an original clock domain from a master controller and a local clock domain. In the context of LED displays, serial strings of LED packages are arranged as LED pixels to receive cascade communication signals, and the original clock domain is derived from a master controller and a local clock domain is derived at each LED package. By providing for the bit period to be maintained and correlated to the original clock domain throughout the repeated cascade communication, problems associated with multiple uncorrelated clock domains in the communication channel, such as sampling jitter, may be averted, thus avoiding loss of data integrity.
