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US Patent 12021054 Redistribution layer (RDL) layouts for integrated circuits

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
July 31, 2023
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Date of Patent
June 25, 2024
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Patent Application Number
18362730
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Patent Citations
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US Patent 8956951 Method for manufacturing SOI wafer
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US Patent 10014340 Stacked SPAD image sensor
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US Patent 9153565 Image sensors with a high fill-factor
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US Patent 10109487 Method for bonding substrates
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US Patent 8242543 Semiconductor wafer-to-wafer bonding for dissimilar semiconductor dies and/or wafers
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US Patent 8829657 Semiconductor substrate, semiconductor chip having the same, and stacked semiconductor package
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Patent Inventor Names
Kuo-Cheng Lee
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Yun-Wei Cheng
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Cheng-Yuan Li
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Yen-Liang Lin
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
12021054
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Patent Primary Examiner
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Nduka E Ojeh
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