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US Patent 12027512 Chipset and manufacturing method thereof
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Patent
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Date Filed
September 8, 2021
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Date of Patent
July 2, 2024
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Patent Application Number
17468687
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Patent Citations
US Patent 10672743 3D Compute circuit with high density z-axis interconnects
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US Patent 10672744 3D compute circuit with high density Z-axis interconnects
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US Patent 10672745 3D processor
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US Patent 11205619 Hybrid bonding using dummy bonding contacts and dummy interconnects
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US Patent 10748851 Hybrid bonding using dummy bonding contacts and dummy interconnects
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US Patent 11557516 3D chip with shared clock distribution network
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US Patent 10580757 Face-to-face mounted IC dies with orthogonal top interconnect layers
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US Patent 10672663 3D chip sharing power circuit
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Patent Inventor Names
Shiqun Gu
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Linglan Zhang
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
12027512
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Patent Primary Examiner
Telly D Green
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CPC Code
H01L 2224/80896
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H01L 2225/06524
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H01L 2225/06541
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H01L 23/28
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H01L 23/481
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H01L 23/49816
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H01L 24/08
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H01L 24/80
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H01L 25/18
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H01L 25/50
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