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US Patent 12061568 Two-wire host interface
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Patent
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Date Filed
September 11, 2020
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Date of Patent
August 13, 2024
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Patent Application Number
17639417
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Patent Citations
US Patent 11687482 Device process scheduling
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US Patent 10430225 Traffic management on an interconnect
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US Patent 6865186 Multiple message multilevel analog signal recording and playback system having memory array configurable for analog and digital storage and serial communication
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Patent Inventor Names
Adrian Wise
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Keith Ahluwalia
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
12061568
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Patent Primary Examiner
Thomas J. Cleary
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CPC Code
G06F 13/4291
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G06F 13/42
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G06F 13/4282
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H04L 12/40078
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G06F 13/4286
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G06F 13/4068
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G06F 1/3206
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