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US Patent 12067262 Replay protected memory block data frame
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Patent
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Date Filed
August 25, 2022
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Date of Patent
August 20, 2024
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Patent Application Number
17895737
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Patent Citations
US Patent 11088845 Non-volatile memory with replay protected memory block having dual key
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US Patent 9329992 Data storage device and flash memory control method
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US Patent 10418115 Managed NAND performance throttling
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US Patent 7107384 Dynamic PCI-bus pre-fetch with separate counters for commands of commands of different data-transfer lengths
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US Patent 8572320 Memory devices and systems including cache devices for memory modules
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US Patent 9098203 Multi-input memory command prioritization
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US Patent 9218891 Data storage device and flash memory control method
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Patent Inventor Names
Greg A. Blodgett
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Sebastien Andre Jean
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
12067262
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Patent Primary Examiner
Sheng Jen Tsai
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CPC Code
G06F 21/602
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G06F 3/0659
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G06F 3/0622
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G06F 21/79
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G06F 3/0679
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