Patent attributes
A receiver circuit includes an input terminal for receiving an input current signal, a transimpedance amplifier having an input node, the transimpedance amplifier converting a current signal input to the input node into a voltage signal, an inductor having a first terminal and a second terminal, and a bypass circuit. The first terminal is coupled to the input terminal and the second terminal is coupled to the input node. The bypass circuit includes a bias circuit supplying a bias voltage, a first variable resistor coupled between the first terminal and the bias circuit, a second variable resistor coupled between the second terminal and the bias circuit, and an impedance adjustment circuit including a resistor and a capacitor connected in parallel to the resistor, the impedance adjustment circuit connected in series to at least one of the first variable resistor and the second variable resistor.