Patent attributes
According to one embodiment, a semiconductor memory device includes: a stacked structure including a plurality of first layers stacked with a second layer therebetween above a substrate having a memory region in which a plurality of memory cells are arranged and an outer edge portion surrounding the memory region, the stacked structure having a stepped portion at which ends of the first layers form a stepped shape at an end of the stacked structure in a first direction within the memory region, wherein at least some of the first layers among the plurality of first layers extend, along a second direction perpendicular to the first direction, from above the outer edge portion at a first end side of the substrate through above the memory region over the substrate to above the outer edge portion at a second end side of the substrate.
