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US Patent 12094828 Eccentric via structures for stress reduction

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
December 18, 2020
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Date of Patent
September 17, 2024
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Patent Application Number
17126881
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Patent Citations
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US Patent 8803306 Fan-out package structure and methods for forming the same
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US Patent 10062648 Semiconductor package and method of forming the same
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US Patent 10157871 Integrated fan-out package and manufacturing method thereof
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US Patent 10204852 Circuit substrate and semiconductor package structure
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US Patent 10475768 Redistribution layers in semiconductor packages and methods of forming same
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US Patent 10522488 Patterning polymer layer to reduce stress
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US Patent 10566288 Structure for standard logic performance improvement having a back-side through-substrate-via
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US Patent 10629560 Semiconductor structure
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US Patent 11264359 Chip bonded to a redistribution structure with curved conductive lines
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US Patent 11508656 Semiconductor package and method
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•••
Patent Inventor Names
Chia-Kuei Hsu
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Po-Yao Lin
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Shin-Puu Jeng
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Chia-Hsiang Lin
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Shu-Shen Yeh
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Che-Chia Yang
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
12094828
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Patent Primary Examiner
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Errol V Fernandes
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CPC Code
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H01L 21/4853
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H01L 21/486
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H01L 23/5384
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