US Patent 12094903 Microstructure enhanced absorption photosensitive devices

Microstructure enhanced photodector arrangements uses a CMOS image sensor (CIS) wafer of crystalline Si and a CMOS Logic Processor (CLP) wafer stacked on each other for electrical interaction. The wafers can be fabricated separately and stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays are enhanced with microstructure holes. Avalanche photodiodes, single photon avalanche photodiodes and phototransistors can be laterally and/or vertically doped. Photodetectors/photosensors can have slanted sidewalls for improved optical confinement and reduced crosstalk.