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US Patent 12113539 Field programmable gate array with external phase-locked loop
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Patent
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Date Filed
December 16, 2022
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Date of Patent
October 8, 2024
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Patent Application Number
18067332
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Patent Citations
US Patent 11502894 Predicting performance of a network order fulfillment system
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US Patent 11575381 Field programmable gate array with external phase-locked loop
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US Patent 7080345 Methods and apparatus for design entry and synthesis of digital circuits
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US Patent 7084709 Hybrid analog/digital phase lock loop frequency synthesizer
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US Patent 7333570 Clock data recovery circuitry associated with programmable logic device circuitry
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US Patent 7945803 Clock generation for multiple clock domains
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US Patent 8467418 Differential timing transfer over synchronous ethernet using digital frequency generators and control word signaling
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US Patent 8873606 Transceiver including a high latency communication channel and a low latency communication channel
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US Patent 8996906 Clock management block
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US Patent 9000801 Implementation of related clocks
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•••
Patent Inventor Names
Nima Badizadegan
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
12113539
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Patent Primary Examiner
Diana J. Cheng
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CPC Code
G06F 30/343
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G06F 30/347
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G06F 1/04
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G06F 30/30
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H04J 3/0658
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H03L 2207/50
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G06F 1/08
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G06F 30/34
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