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US Patent 12118057 Computing partial matrices at hardware accelerator

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
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Date Filed
January 14, 2021
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Date of Patent
October 15, 2024
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Patent Application Number
17149619
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Patent Citations
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US Patent 9112743 Equalization method and equalizer
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US Patent 10901715 Lazy compilation and kernel fusion in dynamic computation graphs
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US Patent 10642614 Reconfigurable multi-precision integer dot-product hardware accelerator for machine-learning applications
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US Patent 11341400 Systems and methods for high-throughput computations in a deep neural network
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US Patent 7509366 Multiplier array processing system with enhanced utilization at lower precision
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US Patent 8275822 Multi-format multiplier unit
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Patent Inventor Names
Derek Edward Davout Gladding
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Balamurugan Kulanthivelu Veluchamy
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Nitin Naresh Garegrat
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Timothy Hume Heil
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
12118057
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Patent Primary Examiner
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Emily E Larocque
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CPC Code
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G06N 3/063
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G06N 3/04
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G06F 17/153
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G06F 17/16
0

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