US Patent 12119640 ESD protection circuit

An electrostatic discharge (ESD) protection circuit is provided to minimize ESD damage to an internal circuit in a CDM model. The ESD protection circuit includes two stages of discharging circuits that are coupled to an IO pin and the internal circuit, a first power clamp circuit, and a second power clamp circuit. The first power clamp circuit is electrically connected to a power rail and a ground rail to discharge a part of a current to the ground, and the second power clamp circuit is electrically connected to a second-stage discharging circuit and the ground rail, so that the other part of the current is discharged to the ground through the second power clamp circuit.