US Patent 12120963 Contact structure formation for memory devices

A semiconductor structure comprises a bottom electrode contact, and a memory device comprising a bottom electrode disposed on the bottom electrode contact, at least one memory element layer disposed on the bottom electrode, and a top electrode disposed on the at least one memory element layer. A bit line contact is disposed on the top electrode and extends around sides of the memory device and of the bottom electrode contact. An encapsulation layer is disposed between the bit line contact and the sides of the memory device and of the bottom electrode contact.