Patent attributes
Turn-off circuits. In one aspect, the turn-off circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, a first pull-down circuit connected to the gate terminal, a second pull-down circuit connected to the gate terminal, and a third pull-down circuit connected to the gate terminal. In another aspect, the first, the second and the third pull-down circuits are arranged to cause a turn off of the transistor by changing a voltage at the gate terminal at a first rate of voltage with respect to time from an on-state voltage to a first intermediate voltage, and from the first intermediate voltage to a second intermediate voltage at a second rate of voltage with respect to time, and from the second intermediate voltage to an off-state voltage at a third rate of voltage with respect to time, wherein the first rate is higher than the second rate.
