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US Patent 12136455 Lifetime mixed level non-volatile memory system

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
March 22, 2024
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Date of Patent
November 5, 2024
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Patent Application Number
18613301
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Patent Citations
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US Patent 7453712 Hybrid flash memory device and method for assigning reserved blocks thereof
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US Patent 7853749 Flash drive fast wear leveling
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US Patent 7855916 Nonvolatile memory systems with embedded fast read and write memories
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US Patent 8010873 Systems and methods for efficient uncorrectable error detection in flash memory
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US Patent 8078794 Hybrid SSD using a combination of SLC and MLC flash memory arrays
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US Patent 8120960 Method and apparatus for accessing a non-volatile memory array comprising unidirectional current flowing multiplexers
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US Patent 8140800 Storage apparatus
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US Patent 8250333 Mapping address table maintenance in a memory device
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US Patent 8356152 Initiative wear leveling for non-volatile memory
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US Patent 8656256 Apparatus and method for multi-mode operation of a flash memory device
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•••
Patent Inventor Names
G. R. Mohan Rao
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
12136455
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Patent Primary Examiner
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Fernando Hidalgo
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CPC Code
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G06F 11/1068
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G06F 11/1072
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G06F 12/0246
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G06F 2212/7202
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G11C 11/5635
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G11C 11/5621
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G11C 11/5678
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G11C 16/16
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G11C 16/3495
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G11C 29/52
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•••

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