US Patent 6846725 Wafer-level package for micro-electro-mechanical systems
Patent 6846725 was granted and assigned to INSTITUTE OF MICROELECTRONICS (IME) on January, 2005 by the United States Patent and Trademark Office.
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Patent abstract
A method for forming wafers having through-wafer vias for wafer-level packaging of devices, the method comprising the steps of depositing metal on one of two wafers; bonding the two wafers using the metal deposited on the one of the two wafers; forming a through-wafer via in one of the two wafers; filling the through-wafer via with a conductive material; and forming a cavity in the one of the two wafers having the through-wafer via wherein the cavity is superposable over a device.
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Patent Inventor Names
Chirayarikathuveedu Sankarapillai Premachandran0
Ranganathan Nagarajan0
Vaidyanathan Kripesh0
Yu Chen0
Date of Patent
January 25, 2005
0Patent Application Number
103515340
Date Filed
January 27, 2003
0Patent Primary Examiner
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US Patent 6846725 Wafer-level package for micro-electro-mechanical systems
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