US Patent 6862213 Semiconductor memory device and control method thereof

A semiconductor memory device comprises a memory cell formed of a nonvolatile resistance variable memory device in which a resistance value is variable according to the application of electrical stress, and a selection transistor; and word-line-voltage feeding means that feeds a word line voltage to a word line to be coupled to the memory cell. When executing a program operation for the memory cell and a verify operation for verifying a program state of the memory cell, the word-line-voltage feeding means feeds the word line voltage of the same voltage level to the word line to be coupled to the memory cell selected as a program target for two operations set as mutually related front and rear steps, namely, a program operation to be executed for the memory cell and a verify operation to be executed to verify a program state of the memory cell.