Patent attributes
In a display device capable of low power and multi-color displaying without raising a frame rate due to increase of display gradations in number by combining a gradation representation through a FRC and a gradation representation system using a pulse width modulation or pulse height modulation method, the gradation representation is executed by a method of pulse width or pulse height modulation in one frame using lower significant N bits to a video signal of M bits, and the display of the gradations is performed by the FRC of the present invention using more significant M−N bits and further using 2M−N−1 frames, and thus the number of the frames required for FRC is reduced to decrease a frame frequency to thereby realize a gradation display with reduction of electric power and suppression of flickers.
