Patent attributes
Low-loss, common-source gate-control topologies may be used to efficiently drive a multiplicity of switches at frequencies greater than 1 MHz and over a range of duty cycles, including 50%. The control switches can be controlled at high speed using simple, directly-coupled drive circuitry. The gate control topology provides for ZVS of control switches and of primary and synchronous rectifier switches while also eliminating essentially all losses associated with the charging and discharging of gate capacitances of the primary and synchronous switches. The overall switching losses in the converter are reduced to the conduction losses in the channels of the switches enabling high operating frequencies to be achieved at high conversion efficiency. An inductive clamp circuit may be incorporated across a winding to provide a low-loss, common source gate drive topology for complementary switches having different duty cycles and an aggregate duty cycle less than 100%. Integrated dual drain FETs enable essentially simultaneous switching of clamp and switch circuitry in the gate drive circuitry.