US Patent 6936899 Bit line contacts

Semiconductor processing methods include forming a plurality of patterned device outlines over a semiconductor substrate, forming electrically insulative partitions or spacers on at least a portion of the patterned device outlines, and forming a plurality of substantially identically shaped devices relative to the patterned device outlines. Individual formed devices are spaced from at least one other of the devices by a distance no more than a width of one of the electrically insulative spacers. In such manner, device pitch is reduced by almost so fifty percent. According to one aspect, capacitors are formed which, according to a one embodiment, form part of a dynamic random access memory (DRAM) array.