US Patent 6940303 System and method to establish an adjustable on-chip impedance

A method to establish an adjustable on-chip impedance within a predetermined range that involves establishing a reference current for the adjustable on-chip impedance and applying this reference current to the adjustable on-chip impedance. A voltage produced by applying the reference current to the adjustable on-chip impedance is sensed and compared with the comparator or other similar processor to a reference voltage. This comparison allows the adjustable on-chip impedance to be tuned when the comparison of the sense voltage and the reference voltage is unfavorable. Tuning the impedance results in an impedance value within a predetermined range that accounts for variances of both the reference current and reference voltage.