Patent attributes
A stackable semiconductor package is disclosed that includes a semiconductor die coupled to a metal leadframe. The semiconductor die is coupled to a die pad and is electrically coupled to leads of the leadframe. The semiconductor die, the die pad, and an inner lead portion of each of the leads is embedded in an encapsulant, and an outer lead portion of each of the leads is free of the encapsulant. A surface of the die pad and of the inner lead portion of each of the leads is exposed in a plane with an exterior first surface of the encapsulant. The outer lead portion is vertically such that a mounting surface of the outer lead portion is provided below an opposite second surface of the encapsulant. Other semiconductor packages or electronic devices may be stacked on and electrically coupled to the exposed surface of the inner lead portions.
