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US Patent 6977930 Pipelined packet switching and queuing architecture
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Patent
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Date Filed
February 14, 2000
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Date of Patent
December 20, 2005
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Patent Application Number
09503552
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Patent Citations Received
US Patent 12095667 Buffer-capacity, network-capacity and routing based circuits for load-balanced fine-grained adaptive routing in high-performance system interconnect
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US Patent 11929911 Shaping outgoing traffic of network packets in a network management system
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US Patent 11943128 Path telemetry data collection
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US Patent 11968129 Delay-based tagging in a network switch
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US Patent 12028263 Telemetry and buffer-capacity based circuits for load-balanced fine-grained adaptive routing in high-performance system interconnect
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US Patent 11855901 Visibility sampling
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US Patent 11863458 Reflected packets
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US Patent 11909584 System and method of data communication
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Patent Inventor Names
Garry P. Epps
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Michael Laor
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
6977930
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Patent Primary Examiner
Seema S. Rao
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