Patent attributes
An imaging apparatus that has a reduced circuit scale and efficiently operates a plurality of solid-state imaging devices. The imaging apparatus includes first and second solid-state imaging devices, first and second drive circuits for driving the first and second solid-state imaging devices, and a timing control circuit for determining the vertical and horizontal scan timing of the first and second solid-state imaging devices in accordance with a reference clock signal having a fixed cycle. A selection circuit selects either one of the first and second image signals in synchronism with an operation timing of the first and second solid-state imaging devices. A signal processing circuit performs a predetermined imaging process on the selected image signal to generate image data. The selection circuit alternately selects the first and second image signals at predetermined time intervals.
