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US Patent 7049652 Pillar cell flash memory technology

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
December 10, 2003
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Date of Patent
May 23, 2006
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Patent Application Number
10732967
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Patent Citations Received
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US Patent 11935756 Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same
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US Patent 12002808 Dual dielectric pillar fork sheet device
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US Patent 12082513 Memory cells with asymmetrical electrode interfaces
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Patent Inventor Names
Nima Mokhlesi
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Jeffrey W. Lutze
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
7049652
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Patent Primary Examiner
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Allan R. Wilson
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