Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Joseph T. Kennedy0
Robert M. Ellis0
Stephen R. Mooney0
Date of Patent
August 1, 2006
0Patent Application Number
107484600
Date Filed
December 29, 2003
0Patent Citations Received
Patent Primary Examiner
Patent abstract
A memory device having memory cells supplied with a separate higher voltage power than the separate power supplied to memory logic, and a lower power state that entails removing power from at least some of the logic such that refresh operations to preserve the contents of the memory cells continue to take place, but at least some of the interface to the memory device is powered down to reduce power consumption.
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