Patent attributes
The multiplexer according to the invention comprises a first data input line (TL1) for incoming data (Data 1), a second data input line (TL2) for incoming data (Data 2), and a data output line (TL3) for outgoing data (Data out). The multiplexer further comprises a control line (20, 21, 22) for applying a control signal (clk) to a first switching means (T1, T3, T5; SR1, SR3, SR5) and a second switching means (T2, T4, T6; SR2, SR4, SR6) for alternatively connecting the first data input line (TL1) over the first switching means (T1, T3, T5; SR1, SR3, SR5) and the second input line (TL2) over the second switching means (T2, T4, T6; SR2, SR4, SR6) to the data output line (TL3), wherein the first and second switching means (T1–T6; SR1–SR6) are spatially arranged in such a way, that the control signal (clk) applied to the first switching means (T1, T3, T5; SR1, SR3, SR5) compared with the control signal (clk) applied to the second switching means (T2, T4, T6; SR2, SR4, SR6) shows a phase shift.
