US Patent 7091763 Clock generation
Patent 7091763 was granted and assigned to Lattice Semiconductor on August, 2006 by the United States Patent and Trademark Office.
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Patent abstract
Clock generation techniques are disclosed to provide clock generation with duty cycle replication. The clock generation techniques may further compensate for clock insertion delays and minimize distortion due to clock distribution networks.
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US Patent 07091763 Clock generation US Patent 7091763 Clock generation
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Patent Number
0709176300
Patent Number
709176300
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Official Website
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
070917630
Date of Patent
August 15, 2006
0Patent Application Number
107010050
Date Filed
November 3, 2003
0Official Website
Patent Primary Examiner
Edits on 26 Sep, 2022
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
070917630
Date of Patent
August 15, 2006
0Patent Application Number
107010050
Date Filed
November 3, 2003
0Official Website
Patent Primary Examiner
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US Patent 07091763 Clock generation
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07091763
Date of patent
August 15, 2006
Patent application number
10701005
Date Filed
November 3, 2003
Patent primary examiner
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