Patent attributes
At least two inputs, at least one output and a clock source for the inputs are provided in a multiplexer. Each input balances an input signal and is coupled to a transistor circuit having two transistors with collectors commonly connected to a power potential. The transistor circuit can be supplied with a first balanced input signal on a first input signal path connected to the base of the first transistor, and with a second balanced input signal on a second input signal path connected to the base of the second transistor. The two balanced input signals are able to have a predetermined switching potential applied to them under the clocking of a driver circuit. In addition, two outgoing signal paths from the emitter of each transistor circuit can be combined to form at least two output signal paths for the at least one output. In this arrangement, the two output signal paths can be connected symmetrically with respect to a reference-ground potential.
