Patent 7100128 was granted and assigned to Cadence Design Systems on August, 2006 by the United States Patent and Trademark Office.
A method of analyzing a design of an electronic circuit uses slices. The method includes generating one or more slices, each slice comprising a contiguous region of the design, and generating an set comprising one or more bins for each slice. A search for an object may be performed by determining a search area, and identifying slices containing at least a portion of the search area. For each identified slice, each object within the search area is associated with one of the bins of the set for the slice.