Patent 7103723 was granted and assigned to Intel on September, 2006 by the United States Patent and Trademark Office.
An arrangement is provided for improving the performance of a computing system, specifically for improving the efficiency of code cache management for a system running platform-independent programs with a small memory footprint. The code cache of such a system is continuously monitored during runtime. When a condition warrants performing code cache management, the priority-based code cache management is performed based on selective code garbage collection. The code garbage collection is conducted selectively for dead methods in the code cache based on probabilities of the dead methods being reused.