Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
September 12, 2006
Patent Application Number
10795516
Date Filed
March 9, 2004
Patent Primary Examiner
Patent abstract
High density static memory cells and arrays containing gated lateral bipolar transistors which can be latched in a bistable on state. Each transistor memory cell includes two gates which are pulse biased during the write operation to latch the cell. Also provided is a CMOS fabrication process to create the cells and arrays.
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