Patent attributes
There is described a signal controlling circuit particularly used in a printer or copier. The circuit includes a delay chain section to generate a plurality of delayed clock signals, a synchronized signal detecting section to detect a number of delay stages, a total delay time of which is equivalent to a single period of the reference clock signal, based on delayed clock signals synchronized with an index signal and are selected from the plurality of delayed clock signals, an index signal counting section to count index signals inputted into the index signal counting section, a phase shift calculating section to calculate a phase shift amount in respect to the reference clock signal, and a delayed clock selecting section to select a specific delayed clock signal out of the plurality of delayed clock signals in an alternative way, so as to output the specific delayed clock signal to an external section.
