US Patent 7118944 Method for fabricating polycrystalline silicon thin film transistor

A thin film transistor device includes a substrate, a buffer layer on the substrate, an active layer on the buffer layer, the active layer is formed of polycrystalline silicon and includes first undoped areas, a second lightly doped area, and third highly doped areas, a gate insulation layer on the buffer layer, a dual-gate electrode on the gate insulation layer including first and second gate electrodes corresponding to the first areas, an interlayer insulator on the gate insulation layer covering the dual-gate electrode, source and drain contact holes exposing the third areas, a gate contact hole penetrating the interlayer insulator to expose a portion of the dual-gate electrode, source and drain electrodes on the interlayer insulator contacting the third areas through the source and drain contact holes, and a third gate electrode on the interlayer insulator contacting the exposed portion of the dual-gate electrode through the gate contact hole.