US Patent 7120043 FeRAM having single ended sensing architecture

A nonvolatile ferroelectric memory device has a single-ended sensing structure. The nonvolatile ferroelectric memory device comprises a plurality of cell array blocks, a plurality of sense amplifiers, a main amplifier unit and a data bus. The sense amplifier unit sets a voltage of a main bit line to a predetermined sensing level before cell data are transmitted to the main bit line, and then senses data by comparing the voltage of the main bit line with the sensing level when cell data are transmitted. Additionally, a data bus which is divided into a local data bus and a global data bus transmits the sensed data, thereby improving the sensing speed and the sensing margin.