An image processor arranged in operation to generate an interpolated video signal from a received video signal representative of an image. The image processor comprises an adaptable register store comprising a plurality of register elements and is coupled to a control processor which is operable to receive the video signal and to provide pixels of the received video signal, under control of the control processor to an interpolator, selected regester elements being connected to the interpolator to provide the pixels of the received video signal for interpolation, each of the register elements being arranged to store a pixel of the received video signal and each is connected to a plurality of other register elements and is configurable under control of the control processor to feed the pixel stored in the register element to one of the plurality of other register elements in accordance with a temporal reference and the interpolator being coupled to the adaptable register store.